1. Field of the Invention
The present invention relates to a core cluster having a parallel core processor structure, which is capable of flexibly controlling computing capacity and energy consumption according to the requirements of vast applications, and an energy scalable vector processing apparatus and a method of vector processing including the core cluster.
2. Description of the Related Art
Processors refer to hardware or IP which executes an algorithm for a specific application by reading instructions from a storage such as a memory or a disk, performing a specific operation on an operand according to operations encoded in the instructions, and storing the operation results.
Processors are widely applied within the field of system semiconductors. Processors have been applied to high-performance media data processing for high-capacity multimedia data, e.g., video data compression and decompression, audio data compression and decompression, audio data conversion and sound effects, etc., intermediate-performance data processing for wired/wireless communication modems, voice codec algorithms, and network data processing, minimum-performance microcontroller platforms such as a touch screen, a household controller, and a motor control, as well as devices such as a wireless sensor network or a ultra-small sized electronic dust to which the application of a stable power supply or an external power supply is impossible. As such, the application range of processors has been widened to a variety of fields.
Conventionally, dedicated processors have been applied, depending on the required performance of applications. A processor having a high operating frequency and requiring a wide hardware area has been used in applications requiring high performance, and a processor having a low frequency but capable of energy efficiency in a small hardware area has been used to applications requiring low performance.
In recent years, however, as the complexity of applications has increased, whole products have been constituted with subsystems adopting various processor platforms.
As one example, a digital video recording (DVR) product is constituted with a variety of subsystems, such as a processor and dedicated hardware based subsystem for video encoding and decoding, a subsystem for external network operation, a microcontroller subsystem for system replication, and so on.
In constituting integrated systems, the use of various processors in the product constituted with a plurality of subsystems acts as a factor to degrade interoperability between platforms constituted with dual processors.
Code differences between processors make it impossible to commonly operate a flash memory or the like and to reuse data and code between processors, leading to an increase in system configuration costs.
The use of common processor platforms meeting the requirements of vast application systems will reduce system configuration costs, increase interoperability between processor platforms, reduce a development period, and control dynamic computing capacity and energy consumption according to system operation conditions.